DFI Lanparty DK X48-T2RSB - Living Review

[Clunk]

Didn't know you had one of these mate?

[Colossous]

Aye - that weird contraption i built has a Qx9650 sat in one of these and the watercooled Gx2 - got vista and SP1 installed yesterday and its running sweet at stock - just need a couple of spare hours to try it out - was testing a cpu on it for a mate yesterday who's Black Ops mobo has gone deaded - i'm liking the test bench ease of swapping out bits my accident case brings to the table hehe !!

[Clunk]

I reckon you could do with updating your system specs then

[Colossous]

OOps lol !! I have 2 on the go but i'll put the posh one up

[Clunk]

Added first impressions & overclocks.

http://www.clunk.org.uk/forums/29102-post9.html

[Clunk]

oops.

[PLK]

Does this mean there will be an updated (X48-TRS) X48-T2RB also
I just bought this board a few months ago and here we go again...

[Clunk]

This is the updated version of the DK X48-T2RS as far as I know

[Praz]

DFI DK X48-T2RSB PLUS, 08/29 BIOS
500x8, Memory 1200MHz
E8600
2x1GB Cell Shock PC2-8000 1000MHz 4-4-4-12
SAPPHIRE 4870
Orange Slots Used For Memory

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CPU Feature Page
Thermal Management Control................Enabled
PPM (EIST) Mode...........................Enabled
Limit CPUID MaxVal........................Disabled
CIE Function..............................Auto
Virtualization Technology.................Enabled
Core Multi-Processing.....................Enabled

Main BIOS Page
Exist Setup Shutdown......................Mode 2
Shutdown After AC Loss....................Disabled
O.C. Fail Retry Counter...................0
O.C. Fail CMOS Reload.....................0
CPU Clock Ratio...........................8x
CPU N/2 Ratio.............................Disabled
CPU Clock.................................500 MHz
Boot Up Clock.............................Auto
CPU Clock Amplitude.......................800mV
CPU Clock0 Skew...........................100ps
CPU Clock0 Skew...........................0ps
DRAM Speed................................333/800
PCIE Clock................................100MHz
PCIE Slot Config..........................1X 1X

CPU Spread Spectrum.......................Disabled
PCIE Spread Spectrum......................Disabled
SATA Spread Spectrum......................Disabled

Voltage Setting Page 
CPU VID Control...........................Auto
CPU VID Special Add.......................101%
DRAM Voltage Control......................2.000V
SB Core/CPU PLL Voltage...................1.510V
NB Core Voltage...........................1.543V
CPU VTT Voltage...........................1.180V
VCore Droop Control.......................Enabled
Clockgen Voltage Control..................3.45V
GTL+ Buffers Strength.....................Strong
Host Slew Rate............................Weak
MCH RON Offset Value......................00
MCH RTT Offset Value......................00
MCH Slew Rate Offset Value................00
MCH VREF 1 Value..........................00
MCH VREF 2 Value..........................00
MCH VREF 3 Value..........................00
CPU GTL 0/2 REF Volt......................0.636X
CPU GTL 1/3 REF Volt......................0.667X
North Bridge GTL REF Volt ................0.67X

DRAM Timing Page
Enhance Data Transmitting.................Fast
Enhance Addressing........................Fast
T2 Dispatch...............................Auto
Clock Setting Fine Delay..................Listed Below

CAS Latency Time (tCL)....................5
RAS# to CAS# Delay (tRCD).................5
RAS# Precharge (tRP)......................5
Precharge Delay (tRAS)....................15
All Precharge to Act......................4
REF to ACT Delay (tRFC)...................36
Performance Level.........................8
Read Delay Phase Adjust...................Listed Below
MCH ODT Latency...........................1
Write to PRE Delay (tWR)..................14
Rank Write to Read (tWTR).................11
ACT to ACT Delay (tRRD)...................3
Read to Write Delay (tRDWR)...............8
Ranks Write to Write (tWRWR)..............Auto
Ranks Read to Read (tRDRD)................Auto
Ranks Write to Read (tWRRD)...............Auto
Read CAS# Precharge (tRTP)................5
ALL PRE to Refresh........................4

Read Delay Phase Adjust Page
Channel 1 Phase 0 Pull-In.................Auto
Channel 1 Phase 1 Pull-In.................Auto
Channel 1 Phase 2 Pull-In.................Auto
Channel 1 Phase 3 Pull-In.................Auto
Channel 1 Phase 4 Pull-In.................Auto

Channel 2 Phase 0 Pull-In.................Auto
Channel 2 Phase 1 Pull-In.................Auto
Channel 2 Phase 2 Pull-In.................Auto
Channel 2 Phase 3 Pull-In.................Auto
Channel 2 Phase 4 Pull-In.................Auto

Clock Setting Fine Delay Page
DRAM CLK Driving Strength.................Level 6
DRAM Data Driving Strength................Level 8
Ch1 DLL Default Skew Model................Model 5
Ch2 DLL Default Skew Model................Model 5

Fine Delay Step Degree....................5ps


Ch1 Clock Crossing Setting................More Aggressive
DIMM 1 Clock fine delay...................Current 1539ps
DIMM 2 Clock fine delay...................Current 345ps
DIMM 1 Control fine delay.................Current 489ps
DIMM 2 Control fine delay.................Current 434ps
Ch 1 Command fine delay...................Current 489ps

Ch2 Clock Crossing Setting................More Aggressive
DIMM 3 Clock fine delay...................Current 256ps
DIMM 4 Clock fine delay...................Current 300ps
DIMM 3 Control fine delay.................Current 523ps
DIMM 4 Control fine delay.................Current 445ps
Ch 2 Command fine delay...................Current 523ps

Ch1Ch2 CommonClock Setting................More Aggressive

Ch1 RDCAS GNT-Chip Delay..................Auto
Ch1 WRCAS GNT-Chip Delay..................Auto
Ch1 Command to CS Delay...................Auto

Ch2 RDCAS GNT-Chip Delay..................Auto
Ch2 WRCAS GNT-Chip Delay..................Auto
Ch2 Command to CS Delay...................Auto

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[Praz]

XP SP3


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3dx Max w/V-ray
Time to render: 14min 03sec

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