Lets try again
CPU Feature Page
Thermal Management Control................Diabled
PPM (EIST) Mode...........................Disabled
Limit CPUID MaxVal........................Disabled
CIE Function..............................Disabled
Execute Disable Bit.......................Disabled
Virtualization Technology.................Disabled
Core Multi-Processing.....................Enabled
Main
BIOS Page
Exist Setup Shutdown......................Mode 2
Shutdown After AC Loss....................Disabled
O. C. Fail Retry Counter..................0
CPU Clock Ratio...........................10x
CPU N/2 Ratio.............................Disabled
CPU Clock.................................420 MHz
Boot Up Clock.............................Auto
CPU Clock Amplitude.......................800mV
CPU Clock0 Skew...........................0ps
CPU Clock0 Skew...........................0ps
DRAM Speed................................400/1333
PCIE Clock................................100MHz
PCIE Slot Config..........................1X 1X
CPU Spread Spectrum.......................Disabled
PCIE Spread Spectrum......................Disabled
SATA Spread Spectrum......................Disabled
Voltage Setting Page
CPU
VID Control........................... 1.3010V
CPU
VID Special Add Limit.................Auto
CPU
VID Special Add.......................Disabled
DRAM Voltage Control......................1.68V
SB Core/CPU
PLL Voltage...................1.510V
NB Core Voltage...........................1.35V
CPU
VTT Voltage...........................1.16V
VCore Droop Control.......................Enabled
Clockgen Voltage Control..................3.45V
GTL+ Buffers Strength.....................Strong
Host Slew Rate............................Strong
GTL REF Voltage Control...................Disabled
CPU
GTL 1/2
REF Volt......................113
CPU
GTL 0/3
REF Volt......................100
North Bridge
GTL REF Volt ................100
DRAM Timing Page
Enhance Data Transmitting.................Auto
Enhance Addressing........................Auto
T2 Dispatch...............................Disabled
Clock Setting Fine Delay..................Listed Below
CAS Latency Time (tCL)....................9
RAS# to CAS# Delay (tRCD).................9
RAS# Precharge (tRP)......................9
Precharge Delay (tRAS)....................24
All Precharge to Act......................Auto
REF to ACT Delay (tRFC)...................Auto
Performance Level.........................Auto
Read Delay Phase Adjust...................Listed Below
MCH ODT Latency...........................Auto
Write to PRE Delay (tWR)..................Auto
Rank Write to Read (tWTR).................Auto
ACT to ACT Delay (tRRD)...................Auto
Read to Write Delay (tRDWR)...............Auto
Ranks Write to Write (tWRWR)..............Auto
Ranks Read to Read (tRDRD)................Auto
Ranks Write to Read (tWRRD)...............Auto
Read CAS# Precharge (tRTP)................Auto
ALL PRE to Refresh........................Auto
Read Delay Phase Adjust Page
Channel 1 Phase 0 Pull-In.................Auto
Channel 1 Phase 1 Pull-In.................Auto
Channel 1 Phase 2 Pull-In.................Auto
Channel 1 Phase 3 Pull-In.................Auto
Channel 1 Phase 4 Pull-In.................Auto
Channel 2 Phase 0 Pull-In.................Auto
Channel 2 Phase 1 Pull-In.................Auto
Channel 2 Phase 2 Pull-In.................Auto
Channel 2 Phase 3 Pull-In.................Auto
Channel 2 Phase 4 Pull-In.................Auto
Clock Setting Fine Delay Page
DRAM CLK Driving Strength............... Level 6
DRAM Data Driving Strength................Level 8
Ch1 DLL Default Skew Model................Model 0
Ch2 DLL Default Skew Model................Model 0
Fine Delay Step Degree....................5ps
Ch1 Clock Crossing Setting................Auto
DIMM 1 Clock fine delay...................Current 489ps
DIMM 2 Clock fine delay...................Current 489ps
DIMM 1 Control fine delay.................Current 434ps
DIMM 2 Control fine delay.................Current 473ps
Ch 1 Command fine delay...................Current 560ps
Ch2 Clock Crossing Setting................Auto
DIMM 3 Clock fine delay...................Current 686ps
DIMM 4 Clock fine delay...................Current 686ps
DIMM 3 Control fine delay.................Current 607ps
DIMM 4 Control fine delay.................Current 654ps
Ch 2 Command fine delay...................Current 693ps
Ch1Ch2 CommonClock Setting................Auto
Ch1 RDCAS GNT-Chip Delay..................Auto
Ch1 WRCAS GNT-Chip Delay..................Auto
Ch1 Command to CS Delay...................Auto
Ch2 RDCAS GNT-Chip Delay..................Auto
Ch2 WRCAS GNT-Chip Delay..................Auto
Ch2 Command to CS Delay...................Auto
Common CMD to CS Timing...................Auto
Is that all the info you need? Ive noticed some differences but i don`t know what they do lol.
Thanks Paul
Linear Mode
