DFI UT X48-T3RS LanParty - Living Review - Page 19

SFB · #**181** 26-06-2008, 23:02

Quote:

Originally Posted by supershanks

Hi SFB,
Welcome to the Forum

See DFI POst Code Errors for explanation of CF. Looks Like your memory may be causing issues

Hi, thanks of your reply.
Tomorrow corsair sent me new memory, because 2 sticks was defective. Is possible that also the other 2 sticks witch I have is defective.
My memory is setting 7-7-7 20 and the voltage is 1,82, mode 0 in bios, NB is 1,44 e Vtt is 1,20

supershanks · #**182** 27-06-2008, 15:30

Might be worth while testing them see Memtest HCI for more info

luck

supershanks · #**183** 27-06-2008, 15:31

Quote:

All voltages, fans and temps are now displayed. A couple of the voltage readings are off though. It is being worked on.

Everest Ultimate Beta

Cheers Praz

Clunk · #**184** 27-06-2008, 16:09

Quote:

Originally Posted by SFB

Hi, thanks of your reply.
Tomorrow corsair sent me new memory, because 2 sticks was defective. Is possible that also the other 2 sticks witch I have is defective.
My memory is setting 7-7-7 20 and the voltage is 1,82, mode 0 in bios, NB is 1,44 e Vtt is 1,20

If you are still on the shipping BIOS, that is the problem. It won't let you boot with CAS7 sticks.

You need to either borrow some other non-CAS7 sticks, or contact DFI and get them to send you a new BIOS chip.

Praz · #**185** 28-06-2008, 03:41

DFI LP UT X48-T3RS, 06/09 BIOS
E8400
480x8.5, Memory 1600MHz
2x2GB OCZ PC3-12800 1600MHz Platinum EB
2x2GB PCZ PC3-10666 1333MHz ReaperX
XFX8800 GTS (G92)
tRD - 8.3, Memset Misreads The Value When Set Manually
Memory Speed - 1600MHZ, CPU-Z Misreports The Divider

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Code:

CPU Feature Page
Thermal Management Control................Enabled
PPM (EIST) Mode...........................Disabled
Limit CPUID MaxVal........................Disabled
CIE Function..............................Disabled
Virtualization Technology.................Disabled
Core Multi-Processing.....................Enabled

Main BIOS Page
Exist Setup Shutdown......................Mode 2
Shutdown After AC Loss....................Disabled
O. C. Fail Retry Counter..................0
CLOCK VC0 Divider.........................Auto
CPU Clock Ratio...........................8.5x
CPU N/2 Ratio.............................Enabled
CPU Clock.................................480 MHz
Boot Up Clock.............................Auto
CPU Clock Amplitude.......................800mV
CPU Clock0 Skew...........................0ps
CPU Clock0 Skew...........................0ps
DRAM Speed................................400/1333
PCIE Clock................................100MHz
PCIE Slot Config..........................1X 1X

CPU Spread Spectrum.......................Disabled
PCIE Spread Spectrum......................Disabled
SATA Spread Spectrum......................Disabled

Voltage Setting Page 
CPU VID Control...........................1.36250V
CPU VID Special Add Limit.................Enabled
CPU VID Special Add.......................Auto
DRAM Voltage Control......................1.874V
SB Core/CPU PLL Voltage...................1.510V
NB Core Voltage...........................1.630V
CPU VTT Voltage...........................1.200V
VCore Droop Control.......................Disabled
Clockgen Voltage Control..................3.45V
GTL+ Buffers Strength.....................Strong
Host Slew Rate............................Weak
GTL REF Voltage Control...................Disabled
CPU GTL 1/2 REF Volt......................113
CPU GTL 0/3 REF Volt......................100
North Bridge GTL REF Volt ................100

DRAM Timing Page
Enhance Data Transmitting.................Fast
Enhance Addressing........................Fast
T2 Dispatch...............................Disabled
Clock Setting Fine Delay..................Listed Below
CAS Latency Time (tCL)....................7
RAS# to CAS# Delay (tRCD).................6
RAS# Precharge (tRP)......................6
Precharge Delay (tRAS)....................20
All Precharge to Act......................7
REF to ACT Delay (tRFC)...................60
Performance Level.........................9
Read Delay Phase Adjust...................Listed Below
MCH ODT Latency...........................Auto
Write to PRE Delay (tWR)..................18
Rank Write to Read (tWTR).................13
ACT to ACT Delay (tRRD)...................4
Read to Write Delay (tRDWR)...............8
Ranks Write to Write (tWRWR)..............Auto
Ranks Read to Read (tRDRD)................Auto
Ranks Write to Read (tWRRD)...............Auto
Read CAS# Precharge (tRTP)................5
ALL PRE to Refresh........................7

Read Delay Phase Adjust Page
Channel 1 Phase 0 Pull-In.................Enabled
Channel 1 Phase 1 Pull-In.................Enabled
Channel 1 Phase 2 Pull-In.................Enabled
Channel 1 Phase 3 Pull-In.................Enabled
Channel 1 Phase 4 Pull-In.................Enabled

Channel 2 Phase 0 Pull-In.................Auto
Channel 2 Phase 1 Pull-In.................Auto
Channel 2 Phase 2 Pull-In.................Auto
Channel 2 Phase 3 Pull-In.................Enabled
Channel 2 Phase 4 Pull-In.................Enabled

Clock Setting Fine Delay Page
DRAM Default Skew Model...................Model 3

Fine Delay Step Degree....................50ps


Ch1 Clock Crossing Setting................Auto
DIMM 1 Clock fine delay...................Current 489ps
DIMM 2 Clock fine delay...................Current 489ps
DIMM 1 Control fine delay.................Current 434ps
DIMM 2 Control fine delay.................Current 473ps
Ch 1 Command fine delay...................Current 550ps

Ch2 Clock Crossing Setting................Auto
DIMM 3 Clock fine delay...................Current 686ps
DIMM 4 Clock fine delay...................Current 686ps
DIMM 3 Control fine delay.................Current 607ps
DIMM 4 Control fine delay.................Current 654ps
Ch 2 Command fine delay...................Current 700ps

Ch1Ch2 CommonClock Setting................Auto

Ch1 RDCAS GNT-Chip Delay..................Auto
Ch1 WRCAS GNT-Chip Delay..................Auto
Ch1 Command to CS Delay...................Auto

Ch2 RDCAS GNT-Chip Delay..................Auto
Ch2 WRCAS GNT-Chip Delay..................Auto
Ch2 Command to CS Delay...................Auto

Common CMD to CS Timing...................2N

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Praz · #**186** 28-06-2008, 03:42

Vista 64 Bit SP1

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3dx Max w/V-ray
Time to render: 15min 36sec

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SFB · #**187** 28-06-2008, 14:56

Quote:

Originally Posted by Clunk

If you are still on the shipping BIOS, that is the problem. It won't let you boot with CAS7 sticks.

You need to either borrow some other non-CAS7 sticks, or contact DFI and get them to send you a new BIOS chip.

I run with the bios 6/9 and it works fine at 400 fsb x 9 (3600) ram 1600 (400/1600) Model 0 cas 7-7-7-20 2T, NB 1.444, SB 1.51, VTT 1.20, Core CPU auto (1.2825), Voltage Ram 1.84.
If I try to set FSB 420-450 or higher, it don't boot, only if I set multi 9,5 or 10 x 400 (3800-4000) and left the ram to 1600 its boot but isn't stable.
Any suggestion is appreciate.
Thanks a lot

Praz · #**188** 28-06-2008, 15:18

Latest official beta BIOS based on the improvements of the alpha versions of the last couple of weeks. Should see memory clocking improvements.

X48BD620.zip

SFB · #**189** 28-06-2008, 15:33

Quote:

Originally Posted by Praz

Latest official beta BIOS based on the improvements of the alpha versions of the last couple of weeks. Should see memory clocking improvements.

X48BD620.zip

Do you have any advice for setting 3800-4000 and 1700-1800 memory?

supershanks · #**190** 28-06-2008, 23:30

Got my Blue back from RMA this am , so thought i'd give them a whirl.
Same issues as before , can't run above 500.

3,880 485x8@400/1600= 1,940Mhz 7-7-7-24
Pretty pleased with this, one of the fastest sub 500 FSB superpi32m I 've managed , run with vdimm of 2v just at the top end of the Cellshock spec. had to run at 2n to preserve ram stability.

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]

Bios X48BD620

Code:

CPU Feature
Thermal Management Control:.......... Enabled
PPM(EIST) Mode:........................... Disabled
Limit CPUID MaxVal:.........................Disabled
CIE Function: ................................Disabled
Execute Disable Bit:........................ Disabled
Virtualization Technology:................ Disabled
Core Multi-Processing:.................... Enabled

Exist Setup Shutdown:................... Mode 2
Shutdown after AC Loss:................ Disabled
O.C. Fail Retry Counter:..................0 
CPU Clock Ratio.............................:8
CPU N/2 Ratioo.............................: Disabled
Target CPU Clock..........................: 3,880Mhz.
CPU Clock....................................: 485
Boot Up Clock...............................: Auto
CPU Clock Amplitude......................: 700mV
CPU Clock0 Skew........................... 0ps:
CPU Clock0 Skew........................... 0ps
DRAM Speed.................................: 400/1600
Target DRAM Speed........................: 1,940
PCIE Clock....................................: 104mhz
PCIE Slot Config.............................: 1X 1X

CPU Spread Spectrum......................: Disabled
PCIE Spread Spectrum:.................... Disabled
SATA Spread Spectrum....................: Disabled

Voltage Settings
CPU VID Control..............................: 1.38125v
CPU VID Special Add Limit.................: Enabled
CPU VID Special .............................: Auto
DRAM Voltage Control......................: 2.00v
SB Core/CPU PLL Voltage..................: 1.510v
NB Core Voltage..............................: 1.467v
CPU VTT Voltage.............................: 1.250v
Vcore Droop Control.........................: Enabled
Clockgen Voltage Contro...................l: 3.45v
GTL+ Buffers Strength......................: Strong
Host Slew Rate...............................: Weak
GTL REF Voltage Control...................: Disable
x CPU GTL1/3 REF Volt......................: 113
x CPU GTL 0/2 REF Volt.....................: 100
x North Bridge GTL REF Volt................: 110

DRAM Timing Page
Enhance Data Transmitting.................Auto
Enhance Addressing........................Auto
T2 Dispatch...............................Auto
CAS Latency Time (tCL)....................7
RAS# to CAS# Delay (tRCD)...............7
RAS# Precharge (tRP).......................7
Precharge Delay (tRAS)....................24
All Precharge to Act...........................8
REF to ACT Delay (tRFC)...................60
Performance Level.............................7
MCH ODT Latency...........................Auto
Write to PRE Delay (tWR)....................22
Rank Write to Read (tWTR).................17
ACT to ACT Delay (tRRD)...................4
Read to Write Delay (tRDWR)...............8
Ranks Write to Write (tWRWR)..............Auto
Ranks Read to Read (tRDRD)................Auto
Ranks Write to Read (tWRRD)...............Auto
Read CAS# Precharge (tRTP).................6
ALL PRE to Refresh...............................8

Read Delay Phase Adjust Page
Channel 1 Phase 0 Pull-In.................Enabled
Channel 1 Phase 1 Pull-In.................Enabled
Channel 1 Phase 2 Pull-In.................Enabled
Channel 1 Phase 3 Pull-In.................Enabled
Channel 1 Phase 4 Pull-In.................Enabled

Channel 2 Phase 0 Pull-In.................Auto
Channel 2 Phase 1 Pull-In.................Auto
Channel 2 Phase 2 Pull-In.................Auto
Channel 2 Phase 3 Pull-In.................Auto
Channel 2 Phase 4 Pull-In.................Auto

Clock Setting Fine Delay Page
Ch1 DLL Default Skew Model...................Model 3
Ch2 DLL Default Skew Model...................Model 3

Fine Delay Step Degree....................5ps


Ch1 Clock Crossing Setting................Auto
DIMM 1 Clock fine delay...................Current 489ps
DIMM 2 Clock fine delay...................Current 489ps
DIMM 1 Control fine delay.................Current 434ps
DIMM 2 Control fine delay.................Current 473ps
Ch 1 Command fine delay...................Current 560ps

Ch2 Clock Crossing Setting................Auto
DIMM 3 Clock fine delay...................Current 686ps
DIMM 4 Clock fine delay...................Current 686ps
DIMM 3 Control fine delay.................Current 607ps
DIMM 4 Control fine delay.................Current 654ps
Ch 2 Command fine delay...................Current 693ps

Ch1Ch2 CommonClock Setting................Auto

Ch1 RDCAS GNT-Chip Delay..................Auto
Ch1 WRCAS GNT-Chip Delay..................Auto
Ch1 Command to CS Delay...................Auto

Ch2 RDCAS GNT-Chip Delay..................Auto
Ch2 WRCAS GNT-Chip Delay..................Auto
Ch2 Command to CS Delay...................Auto

Common CMD to CS Timing...................2N