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E8600 4,250 8.5x500 @333/800 1,201 6-6-6-14
  #31  
Old 05-12-2008, 22:43
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Default E8600 4,250 8.5x500 @333/800 1,201 6-6-6-14

E8600 4,250 8.5x500 @333/800 1,201 6-6-6-14
Now you might well ask why with 1600Mhz rated ram am I messing about with 1,200. For a while, it's all I can do. Posting using the 333/1066 strap/divider (giving 1600Mhz) , causes a hang with the LED showing 50

This is definitely memory or NB related. I've used the same timings as in previous 1600Mhz post adjusting only the divider and Trd (performance) timing. I've taken CPU Multi down to x6 to eliminate any CPU issues, but get the same result.
Have tried changing the options in Clock settinngs Fine delay from auto to relaxed to more relaxed. No improvement.


So I tried dropping the divider to 333/800 giving 1,201, so hennce the title of this post.
Everything is stable, just can't up ram to 333/1066:-

Benches


Stability


Bios Settings
Code:
DFI UT P45-T3RS LanParty
CPU Feature - Sub Menu
Thermal Management Control.......: Enabled
PPM(EIST) Mode...................: Disabled
Limit CPUID MaxVal...............: Disabled
CIE Function.....................: Disabled
Execute Disable Bit..............: Disabled
Virtualization Technology........: Disabled
Core Multi-Processing............: Enabled
--------End Sub Menu--------
Dram Timing - Sub menu
Enhance Data transmitting........: Auto
Enhance Addressing...............: Auto
T2 Dispatch......................: Auto

Clock Setting Fine Delay - Sub Menu
DLL and RCOMP Settings...........: Manual
CH1 Dram Default Skew............: Model1
CH2 Dram Default Skew............: Model1
RCOMP Setting.......................: Model1
Fine Delay Step Degree...........: 70ps
Ch1 Clock Crossing Setting.......: Auto
DIMM 1 Clock fine delay..........: Current 220ps
DIMM 2 Clock fine delay..........: Current 262ps
Ch1 Control0 fine delay..........: Current 248ps
Ch1 Control1 fine delay..........: Current 248ps
Ch1 Control2 fine delay..........: Current 372ps
Ch1 Control3 fine delay..........: Current 372ps
Ch1 Command fine delay...........: Current 220ps
Ch2 Clock Crossing Setting.......: Auto
DIMM 3 Clock fine delay..........: Current 220ps
DIMM 4 Clock fine delay..........: Current 262ps
Ch2 Control0 fine delay..........: Current  248ps
Ch2 Control1 fine delay..........: Current  248ps
Ch2 Control2 fine delay..........: Current  372ps
Ch2 Control3 fine delay..........: Current  372ps
Ch2 Command fine delay...........: Current 220ps

CH1Ch2 CommonClock Setting.......: Auto
Ch1 RDCAS GNT-Chip Delay.........: Auto
Ch1 WRCAS GNT-Chip Delay.........: Auto
Ch1 Command to CS Delay..........: Auto

Ch2 RDCAS GNT-Chip Delay.........: Auto
Ch2 WRCAS GNT-Chip Delay.........: Auto
Ch2 Command to CS Delay..........: Auto 
--------End Clock Setting Fine Delay Sub Menu--------

Flex Memory Mode.................: Disabled
Common CMD to CS Timing......: 1N
CAS Latency Time (tCL).............:  6
RAS# to CAS# Delay (tRCD).......: 6
RAS# Precharge (tRP)...............: 6
Precharge Delay (tRAS)............:14
All Precharge to Act.................:Auto
REF to ACT Delay (tRFC)..........: Auto
Performance LVL (Read Delay).....:  9

Read delay phase adjust - Sub Menu
Ch1 Read delay phase (4~0)    9-9-9-9-9
Channel 1 Phase 0 Pull-In........: Auto
Channel 1 Phase 1 Pull-In........: Auto
Channel 1 Phase 2 Pull-In........: Auto
Channel 1 Phase 3 Pull-In........: Auto
Channel 1 Phase 4 Pull-In........: Auto
Ch2 Read delay phase (4~0)   9-9-9-9-9
Channel 2 Phase 0 Pull-In........: Auto
Channel 2 Phase 1 Pull-In........: Auto
Channel 2 Phase 2 Pull-In........: Auto
Channel 2 Phase 3 Pull-In........: Auto
Channel 2 Phase 4 Pull-In........: Auto
--------End Read Delay Sub Menu--------

Write to PRE Delay (tWR).........: Auto
Rank Write to Read (tWTR)........: Auto
ACT to ACT Delay (tRRD)..........: Auto
Read CAS# Precharge (tRTP).......:Auto
ALL PRE to Refresh: Auto ...........: Auto
--------End Dram Timing Sub Menu--------

Voltage Setting - Sub Menu
CPU VID Control..................: 1.3875v 
CPU VID Special Add Limit........: Enabled
CPU VID Special Add..............: Auto
DRAM Voltage Control.............: 1.89V
SB Core/CPU PLL Voltage..........: 1.55V
NB Core Voltage..................: 1.342V
CPU VTT Voltage..................: 1.327V
Vcore Droop Control..............: Enabled
Clockgen Voltage Control.........: 3.45v
GTL+ Buffers Strength............: Strong
CPU GTL 0 REF Volt...............: 0.635
CPU GTL 2 REF Volt...............: 0.625
CPU GTL 1 REF Volt...............: 0.635
CPU GTL 3 REF Volt...............: 0.625
NB GTL 0 REF Volt................: 0.610
NB GTL 1 REF Volt................: 0.610
FSB Vref.............................: 00
--------End Voltage Sub Menu--------


Exist Setup Shutdown: Mode 2
Shutdown after AC Loss...........: Enabled
AC Shutdown Free.................: Enabled
O.C. Fail retry Counter............: 1
O.C Fail Cmos Reload...............: Disabled
CPU Clock Ratio.....................: x8.5
CPU N/2 ratio.........................:  Enabled
Target CPU Clock.................: 4,250 MHz
CPU Clock........................: 500MHz
Boot Up Clock....................: Auto
CPU Clock Amplitude..............: 800mV
CPU Clock0 Skew..................: 0ps
CPU Clock1 Skew..................: 0ps
DRAM Speed.......................: 333/800
Target DRAM Speed................: 1,201MHz
PCIE Clock.......................: 100MHz
PCIE Slot Config.................: x1 x1
CPU Spread Spectrum..............: Disabled
PCIE Spread Spectrum.............: Disabled
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E8600 8.5x500 400 strap - 8.5x500 400/1066 1,333Mhz 6-6-6-14
  #32  
Old 05-12-2008, 23:52
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Default E8600 8.5x500 400 strap - 8.5x500 400/1066 1,333Mhz 6-6-6-14

E8600 8.5x500 400 strap - 8.5x500 400/1066 1,333Mhz 6-6-6-14
Jimmy at DFI got back to me on my 333/1066 issue, suggesting I try increasing tRFC and/or trying 400/1066. Tried the tRFC on 1600 333/1066 without any change.

Was able to run stable using the 1200 settings listed the post above, only change Dram Speed.
Ran Prime with Large FFTs for an hour, without any issues.
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E8600 8.5x500 400/1,333 1,667 6-6-6-14
  #33  
Old 06-12-2008, 00:08
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Default E8600 8.5x500 400/1,333 1,667 6-6-6-14

8.5x500 400/1,333 1,667 6-6-6-14
So I thought I'd get cocky and tried the above clock.
In regard to my ram it's the first time i've overclocked it and was interested if it would run at 6-6-6-14 rather than the 7-7-7-14 on the box.

Benches


Stability


Bios Settings
As bottom of E8600 4,250 8.5x500 @333/800 1,201 6-6-6-14 Except:-
Dram Speed = 400/1333 giving target ram speed of 1,667Mhz

Last edited by supershanks; 06-12-2008 at 00:27.
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E8600 4,335 8.5x510 400/1,333 = 1,701 6-6-6-14
  #34  
Old 06-12-2008, 00:27
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Default E8600 4,335 8.5x510 400/1,333 = 1,701 6-6-6-14

E8600 4,335 8.5x510 400/1,333 = 1,701 6-6-6-14
So this afternoon , I got a little more ambitious and upped the FSB to 510 putting Ram on 1,700Mhz

Benches



Stability
Had to take CS Timing back to 2N from 1N to get stable.



Bios Settings
As bottom of E8600 4,250 8.5x500 @333/800 1,201 6-6-6-14

Except:-
Code:
FSB = 510
Common Cmd to CSTiming = 1N
Dram Speed = 400/1333
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E8600 4,313 7.5x575 400/1333 1,916 7-7-7-21
  #35  
Old 06-12-2008, 21:41
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Default E8600 4,313 7.5x575 400/1333 1,916 7-7-7-21

4,313 7.5x575 400/1333 1,916 7-7-7-21


Benches



Stability
Work in Progress 40~50 Minutes so far , NB Ram stability needs tweaking.
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  #36  
Old 06-12-2008, 22:16
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Great job mate

That's a damn fine clock in it's own right
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4,313 7.5x575 400/1066 1,532 6-6-6-14
  #37  
Old 06-12-2008, 23:49
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Default 4,313 7.5x575 400/1066 1,532 6-6-6-14

4,313 7.5x575 400/1066 1,532 6-6-6-14
Tried the 1600mhz set first, benches makes an interesting comparison. Not much difference in 32M pi slight difference in latency. 50.4 on 1600 set 49.1 on the 1900.

Benches




Stability
Like the 1900+ nees tweaking.
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  #38  
Old 06-12-2008, 23:59
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Quote:
Great job mate

That's a damn fine clock in it's own right
Ta yes , a few quirks on the other straps but the 400 is working a treat. To say it's only 2nd bios , shows some progress from my DFI UT X48-T3RS experience

Am just starting to experiment running 4x1Gb of the Cellshock 1600Mhz. currently at 8.5x480 400/1333 1600Mhz but so far haven't been able to drop timings down to 6-6-6-14.
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2x1GB v 4x1Gb
  #39  
Old 07-12-2008, 18:52
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Default 2x1GB v 4x1Gb

I have 2 sets of the CS3222271 2GB CellShock DDR3 PC3-12800 1600MHz (7-7-7-14) So far benches & tests have been witth a single pair. So I'm interested to see what I can run 4gb at and what performance hit I take.

So I repeated the 8.5x500 400/1,333 1,667 6-6-6-14 clock. I needed to make two adjustments to get stability.
1) Up Cas Latency Time tCL from 6 to 7
2) Up Common Cmd to CS Timing from 1N to 2N

Benches



Comparison Original 2x1Gb
Compared to running a 2x4gb kit with quietr a lot higher latency, I'm quiet pleased with the result, especially as I picked up these kits for £64.50 each, looks like they've restocked & hiked the £ up by about 15% now.

Stability

Last edited by supershanks; 07-12-2008 at 19:10.
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  #40  
Old 16-12-2008, 08:58
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Great work mate
Still waiting for mine
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