Finally back home, the first thing I noticed is that DFI relased a new beta
BIOS, which added New Micro Code for 45nm CPUs, I upgraded it and also suggest anyone who use 45nm todo the same, as I found some stability improveement, I went back to my previous config and was able to drop cpu,
nb settings to new limits maintaining the same stability, I will share again my settings, just keep in mind that to obtain these result you have to upgrade your
BIOS first, elsewhere it's impossible to make it.
[code]
CPU Feature
Thermal Management Control: Disabled
PPM(EIST) Mode: Disabled
Limit CPUID MaxVal: Disabled
CIE Function: Disabled
Execute Disable Bit: Disabled
Virtualization Technology: Disabled
Core Multi-Processing: Enabled
Exist Setup Shutdown: Mode 2
Shutdown after AC Loss: Disabled
CLOCK VC0 divider: AUTO
CPU Clock Ratio Unlock: Enabled
CPU Clock Ratio:
8X
Target CPU Clock:
3400
CPU Clock:
425
Boot Up Clock: AUTO
DRAM Speed:
AUTO
Target DRAM Speed:
1021
PCIE Clock: 100mhz
PCIE Slot Config: 1X 1X
CPU Spread Spectrum: Disabled
PCIE Spread Spectrum: Disabled
SATA Spread Spectrum: Disabled
Voltage Settings
CPU
VID Control:
1.28750v
CPU
VID Special Add: AUTO
DRAM Voltage Control:
2.10v
SB Core/CPU
PLL Voltage:
1.510v
NB Core Voltage:
1.343v
CPU
VTT Voltage:
1.250v
Vcore Droop Control: Enabled
Clockgen Voltage Control: 3.45v
GTL+ Buffers Strength: Strong
Host Slew Rate: Weak
GTL REF Voltage Control:
Enable
x CPU GTL1/3
REF Volt:
115
x CPU
GTL 0/2
REF Volt:
107
x North Bridge
GTL REF Volt:
100
DRAM Timing
Enhance Data transmitting: AUTO
Enhance Addressing: AUTO
T2 Dispatch: Disabled
Clock Setting Fine Delay
Ch1 Clock Crossing Setting: AUTO
DIMM 1 Clock fine delay: Current
DIMM 2 Clock fine delay: Current
Ch 1 Command fine delay: Current
Ch 1 Control fine delay: Current
Ch2 Clock Crossing Setting: AUTO
DIMM 3 Clock fine delay: Current
DIMM 4 Clock fine delay: Current
Ch 2 Command fine delay: Current
Ch 2 Control fine delay: Current
Ch1Ch2 CommonClock Setting: Auto
Ch1 RDCAS GNT-Chip Delay: Auto
Ch1 WRCAS GNT-Chip Delay: Auto
Ch1 Command to CS Delay: Auto
Ch2 RDCAS GNT-Chip Delay: Auto
Ch2 WRCAS GNT-Chip Delay: Auto
Ch2 Command to CS Delay: Auto
CAS Latency Time (tCL):
5
RAS# to CAS# Delay (tRCD):
5
RAS# Precharge (tRP):
5
Precharge Delay (tRAS):
15
All Precharge to Act: AUTO
REF to ACT Delay (tRFC): AUTO
Performance LVL (Read Delay) (tRD): AUTO
Read delay phase adjust: Enter
Ch1 Read delay phase (4~0)
Channel 1 Phase 0 Pull-In: Auto
Channel 1 Phase 1 Pull-In: Auto
Channel 1 Phase 2 Pull-In: Auto
Channel 1 Phase 3 Pull-In: Auto
Channel 1 Phase 4 Pull-In: Auto
Ch2 Read delay phase (4~0)
Channel 2 Phase 0 Pull-In: Auto
Channel 2 Phase 1 Pull-In: Auto
Channel 2 Phase 2 Pull-In: Auto
Channel 2 Phase 3 Pull-In: Auto
Channel 2 Phase 4 Pull-In: Auto
MCH ODT Latency: AUTO
Write to PRE Delay (tWR): AUTO
Rank Write to Read (tWTR): AUTO
ACT to ACT Delay (tRRD): AUTO
Read to Write Delay (tRDWR): AUTO
Ranks Write to Write (tWRWR): AUTO
Ranks Read to Read (tRDRD): AUTO
Ranks Write to Read (tWRRD): AUTO
Read CAS# Precharge (tRTP): AUTO
ALL PRE to Refresh: AUTO
when I upped it to 3.5Ghz, loaded into windows onto the desktop but didn't go much further so I had to restart. now its not getting past the progress bar screen 
Linear Mode
