DFI LT X48/E6750 Vtt and GTL Ref problem

[Kelainefes]

Aight, i tried a few things and the system looks stable at 3150MHz (450x7) but i can't get it to be stable at 450x8 one core or he other gives me an error within 30 secs.
I tried to use the templates but if i get one core stable, the other invariably starts to fail.
Here's the template, please shed some light on me:

CPU Feature
Thermal Management Control: Disabled
PPM(EIST) Mode: Disabled
Limit CPUID MaxVal: Disabled
CIE Function: Disabled
Execute Disable Bit: Disabled
Virtualization Technology: Disabled
Core Multi-Processing: Enabled

Exist Setup Shutdown: Mode 2
Shutdown after AC Loss: Disabled
CLOCK VC0 divider: AUTO
CPU Clock Ratio Unlock: Enabled
CPU Clock Ratio:8x
Target CPU Clock:3600
CPU Clock:450
Boot Up Clock:auto
DRAM Speed:400/800
Target DRAM Speed: DDR2900
PCIE Clock: 100mhz
PCIE Slot Config: 1X 1X

CPU Spread Spectrum: Disabled
PCIE Spread Spectrum: Disabled
SATA Spread Spectrum: Disabled

Voltage Settings
CPU VID Control:1,37500
CPU VID Special Add:100.23%
DRAM Voltage Control:2.1
SB Core/CPU PLL Voltage:1.510
NB Core Voltage:1.317
CPU VTT Voltage:1.377
Vcore Droop Control: Enabled
Clockgen Voltage Control: 3.45v
GTL+ Buffers Strength: Strong
Host Slew Rate: Weak
GTL REF Voltage Control: Enable
x CPU GTL1/3 REF Volt: 103
x CPU GTL 0/2 REF Volt: 114
x North Bridge GTL REF Volt: 87

DRAM Timing
Enhance Data transmitting: AUTO
Enhance Addressing: AUTO
T2 Dispatch: Disabled

Clock Setting Fine Delay
Ch1 Clock Crossing Setting: AUTO
DIMM 1 Clock fine delay: Current
DIMM 2 Clock fine delay: Current
Ch 1 Command fine delay: Current
Ch 1 Control fine delay: Current


Ch2 Clock Crossing Setting: AUTO
DIMM 3 Clock fine delay: Current
DIMM 4 Clock fine delay: Current
Ch 2 Command fine delay: Current
Ch 2 Control fine delay: Current

Ch1Ch2 CommonClock Setting: Auto

Ch1 RDCAS GNT-Chip Delay: Auto
Ch1 WRCAS GNT-Chip Delay: Auto
Ch1 Command to CS Delay: Auto

Ch2 RDCAS GNT-Chip Delay: Auto
Ch2 WRCAS GNT-Chip Delay: Auto
Ch2 Command to CS Delay: Auto

CAS Latency Time (tCL):
RAS# to CAS# Delay (tRCD):
RAS# Precharge (tRP):
Precharge Delay (tRAS):
All Precharge to Act: AUTO
REF to ACT Delay (tRFC): AUTO
Performance LVL (Read Delay) (tRD): AUTO

Read delay phase adjust: Enter

Ch1 Read delay phase (4~0)
Channel 1 Phase 0 Pull-In: Auto
Channel 1 Phase 1 Pull-In: Auto
Channel 1 Phase 2 Pull-In: Auto
Channel 1 Phase 3 Pull-In: Auto
Channel 1 Phase 4 Pull-In: Auto

Ch2 Read delay phase (4~0)
Channel 2 Phase 0 Pull-In: Auto
Channel 2 Phase 1 Pull-In: Auto
Channel 2 Phase 2 Pull-In: Auto
Channel 2 Phase 3 Pull-In: Auto
Channel 2 Phase 4 Pull-In: Auto

MCH ODT Latency: AUTO
Write to PRE Delay (tWR): AUTO
Rank Write to Read (tWTR): AUTO
ACT to ACT Delay (tRRD): AUTO
Read to Write Delay (tRDWR): AUTO
Ranks Write to Write (tWRWR): AUTO
Ranks Read to Read (tRDRD): AUTO
Ranks Write to Read (tWRRD): AUTO
Read CAS# Precharge (tRTP): AUTO
ALL PRE to Refresh: AUTO

[Clunk]

With that VTT, you should be looking at settings upwards of the yellow.



In fact, you can start off around the yellow ones and work up one at a time until stable.

Exist Setup Shutdown: Mode 2
Shutdown after AC Loss: Disabled
CLOCK VC0 divider: AUTO
CPU Clock Ratio Unlock: Enabled
CPU Clock Ratio:8x
Target CPU Clock:3600
CPU Clock:450
Boot Up Clock:auto
DRAM Speed:400/800 - Try 333/667
Target DRAM Speed: DDR2900 <-? We need this quite low while we get the CPU stable.
PCIE Clock: 100mhz
PCIE Slot Config: 1X 1X

Voltage Settings
CPU VID Control:1,37500
CPU VID Special Add:100.23%
DRAM Voltage Control:2.1 - Is this what the RAM is rated at? If so, thats fine, if not, set it to whatever it should be.
SB Core/CPU PLL Voltage:1.510
NB Core Voltage:1.317 - You will possibly need to up this for 450x8
CPU VTT Voltage:1.377 - Keep this as it is for now, because this VTT corresponds to the GTL table above
Vcore Droop Control: Enabled
Clockgen Voltage Control: 3.45v
GTL+ Buffers Strength: Strong
Host Slew Rate: Weak
GTL REF Voltage Control: Enable
x CPU GTL1/3 REF Volt: 103 See table above
x CPU GTL 0/2 REF Volt: 114 See table above
x North Bridge GTL REF Volt: 87 See table above

DRAM Timing
Enhance Data transmitting: AUTO
Enhance Addressing: AUTO
T2 Dispatch: Disabled

Clock Setting Fine Delay
Ch1 Clock Crossing Setting: AUTO
DIMM 1 Clock fine delay: Current
DIMM 2 Clock fine delay: Current
Ch 1 Command fine delay: Current
Ch 1 Control fine delay: Current


Ch2 Clock Crossing Setting: AUTO
DIMM 3 Clock fine delay: Current
DIMM 4 Clock fine delay: Current
Ch 2 Command fine delay: Current
Ch 2 Control fine delay: Current

Ch1Ch2 CommonClock Setting: Auto

Ch1 RDCAS GNT-Chip Delay: Auto
Ch1 WRCAS GNT-Chip Delay: Auto
Ch1 Command to CS Delay: Auto

Ch2 RDCAS GNT-Chip Delay: Auto
Ch2 WRCAS GNT-Chip Delay: Auto
Ch2 Command to CS Delay: Auto

CAS Latency Time (tCL):
RAS# to CAS# Delay (tRCD):
RAS# Precharge (tRP):
Precharge Delay (tRAS):
All Precharge to Act: AUTO
REF to ACT Delay (tRFC): AUTO
Performance LVL (Read Delay) (tRD): AUTO This can affect your overclock, should be ok for 450 though as it is.

Read delay phase adjust: Enter

Ch1 Read delay phase (4~0)
Channel 1 Phase 0 Pull-In: Auto
Channel 1 Phase 1 Pull-In: Auto
Channel 1 Phase 2 Pull-In: Auto
Channel 1 Phase 3 Pull-In: Auto
Channel 1 Phase 4 Pull-In: Auto

Ch2 Read delay phase (4~0)
Channel 2 Phase 0 Pull-In: Auto
Channel 2 Phase 1 Pull-In: Auto
Channel 2 Phase 2 Pull-In: Auto
Channel 2 Phase 3 Pull-In: Auto
Channel 2 Phase 4 Pull-In: Auto

MCH ODT Latency: AUTO
Write to PRE Delay (tWR): AUTO
Rank Write to Read (tWTR): AUTO
ACT to ACT Delay (tRRD): AUTO
Read to Write Delay (tRDWR): AUTO
Ranks Write to Write (tWRWR): AUTO
Ranks Read to Read (tRDRD): AUTO
Ranks Write to Read (tWRRD): AUTO
Read CAS# Precharge (tRTP): AUTO
ALL PRE to Refresh: AUTO

[Kelainefes]

Umm... i think i cant lower the DDR speed anymore, at 450 FSB, 900 it's 1:1 plus this sticks primed 74 minutes at 1200 (!!!) no errors then i stopped it, and it was at 450x6; looked stable at 450x7 but i didn't stress it that long.

[Clunk]

sorry, it was late and I read the DDR speed wrong.

It's fine, just keep it at 1:1 while we get the CPU stable

[Kelainefes]

I settled down for a lower OC for the moment, here's a screenie taken at the end of the Prime 95 Blend Test run.



Temps stayed beetween 46 and 49 all the time for both cores, Chipset and System both 40-41, heatspreaders of the memories around 35.
I can probably lower some voltages, will try later tonight or tomorrow in the evening.

Here's the BIOS settings:

CPU Feature
Thermal Management Control: Disabled
PPM(EIST) Mode: Disabled
Limit CPUID MaxVal: Disabled
CIE Function: Disabled
Execute Disable Bit: Disabled
Virtualization Technology: Disabled
Core Multi-Processing: Enabled

Exist Setup Shutdown: Mode 2
Shutdown after AC Loss: Disabled
CLOCK VC0 divider: AUTO
CPU Clock Ratio Unlock: Enabled
CPU Clock Ratio:8x
Target CPU Clock:3400
CPU Clock:425
Boot Up Clock:auto
DRAM Speed:400/1066
Target DRAM Speed: DDR2 1133
PCIE Clock: 100mhz
PCIE Slot Config: 1X 1X

CPU Spread Spectrum: Disabled
PCIE Spread Spectrum: Disabled
SATA Spread Spectrum: Disabled

Voltage Settings
CPU VID Control:1,35625
CPU VID Special Add:100.23%
DRAM Voltage Control:2.190
SB Core/CPU PLL Voltage:1.510
NB Core Voltage:1.405
CPU VTT Voltage:1.453
Vcore Droop Control: Enabled
Clockgen Voltage Control: 3.45v
GTL+ Buffers Strength: Strong
Host Slew Rate: Weak
GTL REF Voltage Control: Enable
x CPU GTL1/3 REF Volt: 130
x CPU GTL 0/2 REF Volt: 120
x North Bridge GTL REF Volt: 100

DRAM Timing
Enhance Data transmitting: AUTO
Enhance Addressing: AUTO
T2 Dispatch: Disabled

Clock Setting Fine Delay
Ch1 Clock Crossing Setting: AUTO
DIMM 1 Clock fine delay: Current
DIMM 2 Clock fine delay: Current
Ch 1 Command fine delay: Current
Ch 1 Control fine delay: Current


Ch2 Clock Crossing Setting: AUTO
DIMM 3 Clock fine delay: Current
DIMM 4 Clock fine delay: Current
Ch 2 Command fine delay: Current
Ch 2 Control fine delay: Current

Ch1Ch2 CommonClock Setting: Auto

Ch1 RDCAS GNT-Chip Delay: Auto
Ch1 WRCAS GNT-Chip Delay: Auto
Ch1 Command to CS Delay: Auto

Ch2 RDCAS GNT-Chip Delay: Auto
Ch2 WRCAS GNT-Chip Delay: Auto
Ch2 Command to CS Delay: Auto

CAS Latency Time (tCL):Auto
RAS# to CAS# Delay (tRCD):Auto
RAS# Precharge (tRP):Auto
Precharge Delay (tRAS):Auto
All Precharge to Act: AUTO
REF to ACT Delay (tRFC): AUTO
Performance LVL (Read Delay) (tRD): AUTO

Read delay phase adjust: Enter

Ch1 Read delay phase (4~0)
Channel 1 Phase 0 Pull-In: Auto
Channel 1 Phase 1 Pull-In: Auto
Channel 1 Phase 2 Pull-In: Auto
Channel 1 Phase 3 Pull-In: Auto
Channel 1 Phase 4 Pull-In: Auto

Ch2 Read delay phase (4~0)
Channel 2 Phase 0 Pull-In: Auto
Channel 2 Phase 1 Pull-In: Auto
Channel 2 Phase 2 Pull-In: Auto
Channel 2 Phase 3 Pull-In: Auto
Channel 2 Phase 4 Pull-In: Auto

MCH ODT Latency: AUTO
Write to PRE Delay (tWR): AUTO
Rank Write to Read (tWTR): AUTO
ACT to ACT Delay (tRRD): AUTO
Read to Write Delay (tRDWR): AUTO
Ranks Write to Write (tWRWR): AUTO
Ranks Read to Read (tRDRD): AUTO
Ranks Write to Read (tWRRD): AUTO
Read CAS# Precharge (tRTP): AUTO
ALL PRE to Refresh: AUTO

[Kelainefes]

For a few days i've been trying to get a stable overclock at lower voltages, but i can't get the system to run prime for more than a few hours without errors, i t will take anything from 90 minutes to 4 hours and a half, but on core fails and the other goes on.
If i modify (even by single unit) the GTL ref of that core, the prime run will crash on the other core.
I had 3400 stable, yes, but from what i read 1.45 Vtt is a ridicolously high setting that should be reserved for way higher clocks, expecially with a dual core.
Will post the template later, but just curious, what do you think of setting the REF Voltage to 0.63x, i had the system stable 4 hours that way, with just 1.31 Vtt while i needed 1.45 using 0.67x although it was completely stable.

BTW, when you say that a Vtt voltage setting in the BIOS will give a little bit less output in reality (ie 1.35 BIOS=1.31 actual), do you mean that you can see it in the DFI Smart Guardian, or you get it wrong in there too, and you gave us DMM measurements or have the data from the DFI guys? Cause if i set a Vtt in the Bios, i get a reading very close to it in Smart Guardian.

[Clunk]

Rather than speculate what could work, and what might not, it would be much quicker to measure the VTT and GTL ref yourself and make sure you get the correct value for your setup.

The DMM measurements in the table sare from DFI's own tests - they recommend 67% for both 45nm and 65nm.

In fact, when the GTL voltage adjustment is disabled, it defaults to 67%, this is why is works so well disabled

My advice to you is to set your VTT as low as possible (1.1), disable the GTL ref adjustment and try again.

If that isn't working, I would be looking at testing the RAM to see if you have a stick that is on it's way out.

Does prime fail with small ffts?

Software readings vary widely, and if you really want to know the correct voltage, measure it with a DMM, it's the only way really

[Kelainefes]

The DMM measurements in the table sare from DFI's own tests

Dear DFI we beg you, in the next BIOS revision make it so that what we type in the bios is an actual value plz?
The rest is perfect!

[Kelainefes]

So, i did a lot of trying and with the Vtt at its lowest, 1.21 in the BIOS, i can work ok at 3200 (400x8) it looks, primed 6h ok, and i also tested the memory with memtest86+ 2.01, passed the tests with no errors 2 times in a row; should i test it some other way or is it ok to assume ddr is fine?
Anyway, can't get it stable at 3400 if not using some crazy Vtt (1.45) and anything else it looks ok but one core fails after a few hours, slight adjustements on that core only lead to the other one failing.
At 3600, prime fails after like, 5 seconds tops.
Also, no matter if i set the multi at 6x, it won't even boot at over 460 FSB, not even with 1.45 through CPU and NB.
Is it possible that i got a bad CPU here?
If you want i'll post all the templates.

[Clunk]

You have got the RAM at 1:1 right? Looking at the above settings, you are using the 400/1066 strap....just get it stable using 333/667 first.

Assuming everything is working OK, then it does sounds like your CPU isn't a great one.

Post your BIOS settings, lets have a look