Hello forumers, im new in here, also newbie in overclocking, my friend recommend this website for DFI board, so i just start here
Intel Q9400
DFI LT X48 TR2 (latest
bios)
OCZ PC8500 (1066) Reaper (4 * 1GB)
im really new into this overclocking stuff, looking for guide and profile if can
i just can OC to 3.2Ghz max, with default Vcore,
NB,
VTT and all set to auto
i wanted to OC to 4ghz
btw,this is my
bios setting
DFI LT X48-T2R LanParty
CPU Feature
- Thermal Management Control: Disabled
- PPM(EIST) Mode: Disabled
- Limit CPUID MaxVal: Disabled
- CIE Function: Disabled
- Execute Disable Bit: Enabled
- Virtualization Technology: Enabled
- Core Multi-Processing: Enabled
Exist Setup Shutdown: Mode 2
Shutdown after AC Loss: Disabled
CLOCK VC0 divider: AUTO
CPU Clock Ratio Unlock: Disabled
CPU Clock Ratio: 8
Target CPU Clock: 3200
CPU Clock: 400
Boot Up Clock: Auto
DRAM Speed: 333/800
Target DRAM Speed: 970Mhz
PCIE Clock: 100mhz
PCIE Slot Config: 1X 1X
CPU Spread Spectrum: Disabled
PCIE Spread Spectrum: Disabled
SATA Spread Spectrum: Disabled
Voltage Settings
CPU
VID Control: Default Setting
CPU
VID Special Add: Default Setting
DRAM Voltage Control: Default Setting
SB Core/CPU
PLL Voltage: Default Setting
NB Core Voltage: Default Setting
CPU
VTT Voltage

efault Setting
Vcore Droop Control: Enabled
Clockgen Voltage Control: 3.45v
GTL+ Buffers Strength: Strong
Host Slew Rate: Weak
GTL REF Voltage Control: Disable
x CPU GTL1/3
REF Volt: 110
x CPU
GTL 0/2
REF Volt: 110
x North Bridge
GTL REF Volt: 110
DRAM Timing
- Enhance Data transmitting: Fast
- Enhance Addressing: Fast
- T2 Dispatch: Disabled
Clock Setting Fine Delay
Ch1 Clock Crossing Setting: More Aggresive
- DIMM 1 Clock fine delay: Current
- DIMM 2 Clock fine delay: Current
- Ch 1 Command fine delay: Current
- Ch 1 Control fine delay: Current
Ch2 Clock Crossing Setting: More Aggresive
- DIMM 3 Clock fine delay: Current
- DIMM 4 Clock fine delay: Current
- Ch 2 Command fine delay: Current
- Ch 2 Control fine delay: Current
Ch1Ch2 CommonClock Setting: More Aggresive
Ch1 RDCAS GNT-Chip Delay: Auto
Ch1 WRCAS GNT-Chip Delay: Auto
Ch1 Command to CS Delay: Auto
Ch2 RDCAS GNT-Chip Delay: Auto
Ch2 WRCAS GNT-Chip Delay: Auto
Ch2 Command to CS Delay: Auto
CAS Latency Time (tCL): 5
RAS# to CAS# Delay (tRCD): 5
RAS# Precharge (tRP): 5
Precharge Delay (tRAS): 15
All Precharge to Act: AUTO
REF to ACT Delay (tRFC): AUTO
Performance LVL (Read Delay) (tRD): 8
Read delay phase adjust: Enter
Ch1 Read delay phase (4~0)
- Channel 1 Phase 0 Pull-In: Auto
- Channel 1 Phase 1 Pull-In: Auto
- Channel 1 Phase 2 Pull-In: Auto
- Channel 1 Phase 3 Pull-In: Auto
- Channel 1 Phase 4 Pull-In: Auto
Ch2 Read delay phase (4~0)
- Channel 2 Phase 0 Pull-In: Auto
- Channel 2 Phase 1 Pull-In: Auto
- Channel 2 Phase 2 Pull-In: Auto
- Channel 2 Phase 3 Pull-In: Auto
- Channel 2 Phase 4 Pull-In: Auto
MCH ODT Latency: AUTO
Write to PRE Delay (tWR): AUTO
Rank Write to Read (tWTR): AUTO
ACT to ACT Delay (tRRD): AUTO
Read to Write Delay (tRDWR): AUTO
Ranks Write to Write (tWRWR): AUTO
Ranks Read to Read (tRDRD): AUTO
Ranks Write to Read (tWRRD): AUTO
Read CAS# Precharge (tRTP): AUTO
ALL PRE to Refresh: AUTO