q9450 & UT-X48-T2R ocing help

[Cicatrix]

Hey everybody,

I had a stable overclock till i flashed to the latest beta bios in order to use my HD4870X2. Now i can't get a stable overclock.

Also i get 70 degrees C on all 4 cores.

I know i need to post my settings but is it OK to use the LT-x48-t2r template as i can't find a UT-x48-T2R template?

Thanks

[Clunk]

Welcome to the forums

Yep, its the same template.

[Cicatrix]

Originally Posted by Clunk

Welcome to the forums

Yep, its the same template.

Thank you

CPU Feature
Thermal Management Control: Disabled
PPM(EIST) Mode: Disabled
Limit CPUID MaxVal: Disabled
CIE Function: Disabled
Execute Disable Bit: Disabled
Virtualization Technology: Disabled
Core Multi-Processing: Enabled

Exist Setup Shutdown: Mode 2
Shutdown after AC Loss: Disabled
CLOCK VC0 divider: AUTO
CPU Clock Ratio Unlock: Enabled
CPU Clock Ratio: 8X
Target CPU Clock: 3200
CPU Clock: 400
Boot Up Clock:
DRAM Speed: 400/800
Target DRAM Speed: ddr800
PCIE Clock: 100mhz
PCIE Slot Config: 1X 1X

CPU Spread Spectrum: Disabled
PCIE Spread Spectrum: Disabled
SATA Spread Spectrum: Disabled

Voltage Settings
CPU VID Control: 1.35
CPU VID Special Add: Disabled
DRAM Voltage Control: 2.1
SB Core/CPU PLL Voltage: 1.64
NB Core Voltage: 1.392
CPU VTT Voltage: 1.2
Vcore Droop Control: Enabled
Clockgen Voltage Control: 3.45v
GTL+ Buffers Strength: Strong
Host Slew Rate: Weak
GTL REF Voltage Control: Disable
x CPU GTL1/3 REF Volt: 110
x CPU GTL 0/2 REF Volt: 110
x North Bridge GTL REF Volt: 110

DRAM Timing
Enhance Data transmitting: AUTO
Enhance Addressing: AUTO
T2 Dispatch: Disabled

Clock Setting Fine Delay
Ch1 Clock Crossing Setting: AUTO
DIMM 1 Clock fine delay: Current
DIMM 2 Clock fine delay: Current
Ch 1 Command fine delay: Current
Ch 1 Control fine delay: Current


Ch2 Clock Crossing Setting: AUTO
DIMM 3 Clock fine delay: Current
DIMM 4 Clock fine delay: Current
Ch 2 Command fine delay: Current
Ch 2 Control fine delay: Current

Ch1Ch2 CommonClock Setting: Auto

Ch1 RDCAS GNT-Chip Delay: Auto
Ch1 WRCAS GNT-Chip Delay: Auto
Ch1 Command to CS Delay: Auto

Ch2 RDCAS GNT-Chip Delay: Auto
Ch2 WRCAS GNT-Chip Delay: Auto
Ch2 Command to CS Delay: Auto 

CAS Latency Time (tCL):4
RAS# to CAS# Delay (tRCD):4
RAS# Precharge (tRP):4
Precharge Delay (tRAS):12All Precharge to Act: AUTO
REF to ACT Delay (tRFC): AUTO
Performance LVL (Read Delay) (tRD): AUTO

Read delay phase adjust: Enter

Ch1 Read delay phase (4~0)
Channel 1 Phase 0 Pull-In: Auto
Channel 1 Phase 1 Pull-In: Auto
Channel 1 Phase 2 Pull-In: Auto
Channel 1 Phase 3 Pull-In: Auto
Channel 1 Phase 4 Pull-In: Auto

Ch2 Read delay phase (4~0)
Channel 2 Phase 0 Pull-In: Auto
Channel 2 Phase 1 Pull-In: Auto
Channel 2 Phase 2 Pull-In: Auto
Channel 2 Phase 3 Pull-In: Auto
Channel 2 Phase 4 Pull-In: Auto

MCH ODT Latency: AUTO
Write to PRE Delay (tWR): AUTO
Rank Write to Read (tWTR): AUTO
ACT to ACT Delay (tRRD): AUTO
Read to Write Delay (tRDWR): AUTO
Ranks Write to Write (tWRWR): AUTO
Ranks Read to Read (tRDRD): AUTO
Ranks Write to Read (tWRRD): AUTO
Read CAS# Precharge (tRTP): AUTO
ALL PRE to Refresh: AUTO

CPU vid as reported by core temp is 1.25V but cpu-z reports core voltage as 1.392v

At the moment this has been on prime 95 for 5 hours 20 and is still ok.


But I would really like to get my temps down. I have seen a lot of ppl using GTL. I am not; is this the reason that i'm getting high core temps?

Core temperatures are:

Core temp: 70 70 68 69
Real temp core temperatures (the top line ):60 60 57 59
Speed fan: 65 65 62 64
PC wizard: 70 69 68 69 (however shows a processor temp of 63)

I have been told that core temp is the most accurate.

I would like my processor to last a few years

Thanks

[Cicatrix]

Ok it ran for 8 hours and 21 minutes before i got a rounding error:

Rounding was 0.5 expected less than 0.4.

should i try with vtt =1.25? increasing my vtt helped last time

What should i do?